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<div class="title">xenhance_hw.h File Reference</div>  </div>
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Macros</h2></td></tr>
<tr class="memitem:gadac15fad1ba47afee8ab06e4d93db5ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gadac15fad1ba47afee8ab06e4d93db5ed">XENHANCE_HW_H_</a></td></tr>
<tr class="memdesc:gadac15fad1ba47afee8ab06e4d93db5ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prevent circular inclusions by using protection macros.  <a href="group__enhance__v7__0.html#gadac15fad1ba47afee8ab06e4d93db5ed">More...</a><br /></td></tr>
<tr class="separator:gadac15fad1ba47afee8ab06e4d93db5ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga22996994009945110250415f4a458bca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga22996994009945110250415f4a458bca">XEnhance_In32</a>&#160;&#160;&#160;Xil_In32</td></tr>
<tr class="memdesc:ga22996994009945110250415f4a458bca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enhance Input Operation.  <a href="group__enhance__v7__0.html#ga22996994009945110250415f4a458bca">More...</a><br /></td></tr>
<tr class="separator:ga22996994009945110250415f4a458bca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga52a9d8e6362223499033bc73317b966d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga52a9d8e6362223499033bc73317b966d">XEnhance_Out32</a>&#160;&#160;&#160;Xil_Out32</td></tr>
<tr class="memdesc:ga52a9d8e6362223499033bc73317b966d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enhance Output Operation.  <a href="group__enhance__v7__0.html#ga52a9d8e6362223499033bc73317b966d">More...</a><br /></td></tr>
<tr class="separator:ga52a9d8e6362223499033bc73317b966d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0bf5fba775e0a7d6449bff866aac5a24"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga0bf5fba775e0a7d6449bff866aac5a24">XEnhance_ReadReg</a>(BaseAddress,  RegOffset)&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga22996994009945110250415f4a458bca">XEnhance_In32</a>((BaseAddress) + (u32)(RegOffset))</td></tr>
<tr class="memdesc:ga0bf5fba775e0a7d6449bff866aac5a24"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro reads the given register.  <a href="group__enhance__v7__0.html#ga0bf5fba775e0a7d6449bff866aac5a24">More...</a><br /></td></tr>
<tr class="separator:ga0bf5fba775e0a7d6449bff866aac5a24"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab5694a82feda035f4229565fd76601a7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gab5694a82feda035f4229565fd76601a7">XEnhance_WriteReg</a>(BaseAddress,  RegOffset,  Data)&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga52a9d8e6362223499033bc73317b966d">XEnhance_Out32</a>((BaseAddress) + (u32)(RegOffset), (Data))</td></tr>
<tr class="memdesc:gab5694a82feda035f4229565fd76601a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function macro writes the given register.  <a href="group__enhance__v7__0.html#gab5694a82feda035f4229565fd76601a7">More...</a><br /></td></tr>
<tr class="separator:gab5694a82feda035f4229565fd76601a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Control Registers</div></td></tr>
<tr class="memitem:gac02c39726e454397a7c99fcc8bad831f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gac02c39726e454397a7c99fcc8bad831f">XENH_CONTROL_OFFSET</a>&#160;&#160;&#160;0x0000</td></tr>
<tr class="memdesc:gac02c39726e454397a7c99fcc8bad831f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control Offset.  <a href="group__enhance__v7__0.html#gac02c39726e454397a7c99fcc8bad831f">More...</a><br /></td></tr>
<tr class="separator:gac02c39726e454397a7c99fcc8bad831f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae35a4d3eb15145f520b65e126c13b0d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gae35a4d3eb15145f520b65e126c13b0d5">XENH_STATUS_OFFSET</a>&#160;&#160;&#160;0x0004</td></tr>
<tr class="memdesc:gae35a4d3eb15145f520b65e126c13b0d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status Offset.  <a href="group__enhance__v7__0.html#gae35a4d3eb15145f520b65e126c13b0d5">More...</a><br /></td></tr>
<tr class="separator:gae35a4d3eb15145f520b65e126c13b0d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae45f51dd0d46b8f35b612ed3321c8b04"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gae45f51dd0d46b8f35b612ed3321c8b04">XENH_ERROR_OFFSET</a>&#160;&#160;&#160;0x0008</td></tr>
<tr class="memdesc:gae45f51dd0d46b8f35b612ed3321c8b04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error Offset.  <a href="group__enhance__v7__0.html#gae45f51dd0d46b8f35b612ed3321c8b04">More...</a><br /></td></tr>
<tr class="separator:gae45f51dd0d46b8f35b612ed3321c8b04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32c1a8cffe09936d9e052568b24cb604"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga32c1a8cffe09936d9e052568b24cb604">XENH_IRQ_EN_OFFSET</a>&#160;&#160;&#160;0x000C</td></tr>
<tr class="memdesc:ga32c1a8cffe09936d9e052568b24cb604"><td class="mdescLeft">&#160;</td><td class="mdescRight">IRQ Enable Offset.  <a href="group__enhance__v7__0.html#ga32c1a8cffe09936d9e052568b24cb604">More...</a><br /></td></tr>
<tr class="separator:ga32c1a8cffe09936d9e052568b24cb604"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3957a8d03c339ff0bf8da971956a8e6a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga3957a8d03c339ff0bf8da971956a8e6a">XENH_VERSION_OFFSET</a>&#160;&#160;&#160;0x0010</td></tr>
<tr class="memdesc:ga3957a8d03c339ff0bf8da971956a8e6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version Offset.  <a href="group__enhance__v7__0.html#ga3957a8d03c339ff0bf8da971956a8e6a">More...</a><br /></td></tr>
<tr class="separator:ga3957a8d03c339ff0bf8da971956a8e6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4897593c07843cd849441417a73ef0fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga4897593c07843cd849441417a73ef0fc">XENH_SYSDEBUG0_OFFSET</a>&#160;&#160;&#160;0x0014</td></tr>
<tr class="memdesc:ga4897593c07843cd849441417a73ef0fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">System Debug 0 Offset.  <a href="group__enhance__v7__0.html#ga4897593c07843cd849441417a73ef0fc">More...</a><br /></td></tr>
<tr class="separator:ga4897593c07843cd849441417a73ef0fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga221c5f74f4dace1d6040680097e2fdf0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga221c5f74f4dace1d6040680097e2fdf0">XENH_SYSDEBUG1_OFFSET</a>&#160;&#160;&#160;0x0018</td></tr>
<tr class="memdesc:ga221c5f74f4dace1d6040680097e2fdf0"><td class="mdescLeft">&#160;</td><td class="mdescRight">System Debug 1 Offset.  <a href="group__enhance__v7__0.html#ga221c5f74f4dace1d6040680097e2fdf0">More...</a><br /></td></tr>
<tr class="separator:ga221c5f74f4dace1d6040680097e2fdf0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaabb5414fbc805f667e8faa7b10e78641"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaabb5414fbc805f667e8faa7b10e78641">XENH_SYSDEBUG2_OFFSET</a>&#160;&#160;&#160;0x001C</td></tr>
<tr class="memdesc:gaabb5414fbc805f667e8faa7b10e78641"><td class="mdescLeft">&#160;</td><td class="mdescRight">System Debug 2 Offset.  <a href="group__enhance__v7__0.html#gaabb5414fbc805f667e8faa7b10e78641">More...</a><br /></td></tr>
<tr class="separator:gaabb5414fbc805f667e8faa7b10e78641"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Timing Control Registers</div></td></tr>
<tr class="memitem:gadaf48c1c0f6cc7290fdd94ffbd835726"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gadaf48c1c0f6cc7290fdd94ffbd835726">XENH_ACTIVE_SIZE_OFFSET</a>&#160;&#160;&#160;0x0020</td></tr>
<tr class="memdesc:gadaf48c1c0f6cc7290fdd94ffbd835726"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal and Vertical Active Frame Size Offset.  <a href="group__enhance__v7__0.html#gadaf48c1c0f6cc7290fdd94ffbd835726">More...</a><br /></td></tr>
<tr class="separator:gadaf48c1c0f6cc7290fdd94ffbd835726"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Core Specific Registers</div></td></tr>
<tr class="memitem:gaf58fa6c3773713146da3ec3673db1ac1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaf58fa6c3773713146da3ec3673db1ac1">XENH_NOISE_THRESHOLD_OFFSET</a>&#160;&#160;&#160;0x0100</td></tr>
<tr class="memdesc:gaf58fa6c3773713146da3ec3673db1ac1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Noise Reduction Control Active.  <a href="group__enhance__v7__0.html#gaf58fa6c3773713146da3ec3673db1ac1">More...</a><br /></td></tr>
<tr class="separator:gaf58fa6c3773713146da3ec3673db1ac1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga885cd8bf6e191b9d29baff719566b5ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga885cd8bf6e191b9d29baff719566b5ac">XENH_ENHANCE_STRENGTH_OFFSET</a>&#160;&#160;&#160;0x0104</td></tr>
<tr class="memdesc:ga885cd8bf6e191b9d29baff719566b5ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Edge Enhancement Control Active.  <a href="group__enhance__v7__0.html#ga885cd8bf6e191b9d29baff719566b5ac">More...</a><br /></td></tr>
<tr class="separator:ga885cd8bf6e191b9d29baff719566b5ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac224e30335309717fe4f82edfe46bb6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gac224e30335309717fe4f82edfe46bb6c">XENH_HALO_SUPPRESS_OFFSET</a>&#160;&#160;&#160;0x0108</td></tr>
<tr class="memdesc:gac224e30335309717fe4f82edfe46bb6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Halo Suppression Control Active.  <a href="group__enhance__v7__0.html#gac224e30335309717fe4f82edfe46bb6c">More...</a><br /></td></tr>
<tr class="separator:gac224e30335309717fe4f82edfe46bb6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Enhance Control Register Bit Masks</div></td></tr>
<tr class="memitem:ga1977282c1370b7a9b85323733962b351"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga1977282c1370b7a9b85323733962b351">XENH_CTL_SW_EN_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga1977282c1370b7a9b85323733962b351"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable Mask.  <a href="group__enhance__v7__0.html#ga1977282c1370b7a9b85323733962b351">More...</a><br /></td></tr>
<tr class="separator:ga1977282c1370b7a9b85323733962b351"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa715dd1e076653a21145849c629bb012"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaa715dd1e076653a21145849c629bb012">XENH_CTL_RUE_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gaa715dd1e076653a21145849c629bb012"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register Update Enable Mask.  <a href="group__enhance__v7__0.html#gaa715dd1e076653a21145849c629bb012">More...</a><br /></td></tr>
<tr class="separator:gaa715dd1e076653a21145849c629bb012"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf4790c9faa05ed1889582633df53b32"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gabf4790c9faa05ed1889582633df53b32">XENH_CTL_BPE_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:gabf4790c9faa05ed1889582633df53b32"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bypass Mask.  <a href="group__enhance__v7__0.html#gabf4790c9faa05ed1889582633df53b32">More...</a><br /></td></tr>
<tr class="separator:gabf4790c9faa05ed1889582633df53b32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1a97cc54dd0c87e25434ae4f03b7d925"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga1a97cc54dd0c87e25434ae4f03b7d925">XENH_CTL_TPE_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga1a97cc54dd0c87e25434ae4f03b7d925"><td class="mdescLeft">&#160;</td><td class="mdescRight">Test Pattern Mask.  <a href="group__enhance__v7__0.html#ga1a97cc54dd0c87e25434ae4f03b7d925">More...</a><br /></td></tr>
<tr class="separator:ga1a97cc54dd0c87e25434ae4f03b7d925"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e3fc91cb107b7993e42bd635572f96f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga7e3fc91cb107b7993e42bd635572f96f">XENH_CTL_AUTORESET_MASK</a>&#160;&#160;&#160;0x40000000</td></tr>
<tr class="memdesc:ga7e3fc91cb107b7993e42bd635572f96f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software Reset - Auto-synchronize to SOF Mask.  <a href="group__enhance__v7__0.html#ga7e3fc91cb107b7993e42bd635572f96f">More...</a><br /></td></tr>
<tr class="separator:ga7e3fc91cb107b7993e42bd635572f96f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0cac2df49aa7642c05f4e42c34f46b7c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga0cac2df49aa7642c05f4e42c34f46b7c">XENH_CTL_RESET_MASK</a>&#160;&#160;&#160;0x80000000</td></tr>
<tr class="memdesc:ga0cac2df49aa7642c05f4e42c34f46b7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software Reset - Instantaneous Mask.  <a href="group__enhance__v7__0.html#ga0cac2df49aa7642c05f4e42c34f46b7c">More...</a><br /></td></tr>
<tr class="separator:ga0cac2df49aa7642c05f4e42c34f46b7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Interrupt Register Bit Masks. It is applicable for</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>Status and Irq_Enable Registers </p>
</div></td></tr>
<tr class="memitem:gaed0578d40be1c670d62509138b6415df"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaed0578d40be1c670d62509138b6415df">XENH_IXR_PROCS_STARTED_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:gaed0578d40be1c670d62509138b6415df"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process started Mask.  <a href="group__enhance__v7__0.html#gaed0578d40be1c670d62509138b6415df">More...</a><br /></td></tr>
<tr class="separator:gaed0578d40be1c670d62509138b6415df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae8e8ed045dc49ef46dacd17e46a6560f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gae8e8ed045dc49ef46dacd17e46a6560f">XENH_IXR_EOF_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gae8e8ed045dc49ef46dacd17e46a6560f"><td class="mdescLeft">&#160;</td><td class="mdescRight">End-Of-Frame Mask.  <a href="group__enhance__v7__0.html#gae8e8ed045dc49ef46dacd17e46a6560f">More...</a><br /></td></tr>
<tr class="separator:gae8e8ed045dc49ef46dacd17e46a6560f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf0b0e8986d488f60af694fc106436e40"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaf0b0e8986d488f60af694fc106436e40">XENH_IXR_SE_MASK</a>&#160;&#160;&#160;0x00010000</td></tr>
<tr class="memdesc:gaf0b0e8986d488f60af694fc106436e40"><td class="mdescLeft">&#160;</td><td class="mdescRight">Slave Error Mask.  <a href="group__enhance__v7__0.html#gaf0b0e8986d488f60af694fc106436e40">More...</a><br /></td></tr>
<tr class="separator:gaf0b0e8986d488f60af694fc106436e40"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7f75d0542d4b21b690b0381b1deabc6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gae7f75d0542d4b21b690b0381b1deabc6">XENH_IXR_ALLINTR_MASK</a>&#160;&#160;&#160;0x00010003</td></tr>
<tr class="memdesc:gae7f75d0542d4b21b690b0381b1deabc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">OR'ing of all Mask.  <a href="group__enhance__v7__0.html#gae7f75d0542d4b21b690b0381b1deabc6">More...</a><br /></td></tr>
<tr class="separator:gae7f75d0542d4b21b690b0381b1deabc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Enhance Error Register Bit Masks</div></td></tr>
<tr class="memitem:ga377a0698e2fd664201766561151d2cd8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga377a0698e2fd664201766561151d2cd8">XENH_ERR_EOL_EARLY_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga377a0698e2fd664201766561151d2cd8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame EOL early Mask.  <a href="group__enhance__v7__0.html#ga377a0698e2fd664201766561151d2cd8">More...</a><br /></td></tr>
<tr class="separator:ga377a0698e2fd664201766561151d2cd8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga62538a67809eeeaf011da50e3bdb2899"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga62538a67809eeeaf011da50e3bdb2899">XENH_ERR_EOL_LATE_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga62538a67809eeeaf011da50e3bdb2899"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame EOL late Mask.  <a href="group__enhance__v7__0.html#ga62538a67809eeeaf011da50e3bdb2899">More...</a><br /></td></tr>
<tr class="separator:ga62538a67809eeeaf011da50e3bdb2899"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaae97df4e124f8f1eda9d0bc61c3aadf7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaae97df4e124f8f1eda9d0bc61c3aadf7">XENH_ERR_SOF_EARLY_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:gaae97df4e124f8f1eda9d0bc61c3aadf7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame SOF early Mask.  <a href="group__enhance__v7__0.html#gaae97df4e124f8f1eda9d0bc61c3aadf7">More...</a><br /></td></tr>
<tr class="separator:gaae97df4e124f8f1eda9d0bc61c3aadf7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa61797d95f4c749ae22028c6e38e33db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaa61797d95f4c749ae22028c6e38e33db">XENH_ERR_SOF_LATE_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:gaa61797d95f4c749ae22028c6e38e33db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame SOF late Mask.  <a href="group__enhance__v7__0.html#gaa61797d95f4c749ae22028c6e38e33db">More...</a><br /></td></tr>
<tr class="separator:gaa61797d95f4c749ae22028c6e38e33db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Enhance Version Register bit definition</div></td></tr>
<tr class="memitem:gae671f0e12cbaa4a4eee54bbf9f860ec7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gae671f0e12cbaa4a4eee54bbf9f860ec7">XENH_VER_REV_NUM_MASK</a>&#160;&#160;&#160;0x000000FF</td></tr>
<tr class="memdesc:gae671f0e12cbaa4a4eee54bbf9f860ec7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Revision Number Mask.  <a href="group__enhance__v7__0.html#gae671f0e12cbaa4a4eee54bbf9f860ec7">More...</a><br /></td></tr>
<tr class="separator:gae671f0e12cbaa4a4eee54bbf9f860ec7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga269cbadc2eda675e0f4092a66aba430b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga269cbadc2eda675e0f4092a66aba430b">XENH_VER_PID_MASK</a>&#160;&#160;&#160;0x00000F00</td></tr>
<tr class="memdesc:ga269cbadc2eda675e0f4092a66aba430b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Patch ID Mask.  <a href="group__enhance__v7__0.html#ga269cbadc2eda675e0f4092a66aba430b">More...</a><br /></td></tr>
<tr class="separator:ga269cbadc2eda675e0f4092a66aba430b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3f10e826d5983a3c7c0de385539fcd0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gac3f10e826d5983a3c7c0de385539fcd0">XENH_VER_MINOR_MASK</a>&#160;&#160;&#160;0x00FF0000</td></tr>
<tr class="memdesc:gac3f10e826d5983a3c7c0de385539fcd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version Minor Mask.  <a href="group__enhance__v7__0.html#gac3f10e826d5983a3c7c0de385539fcd0">More...</a><br /></td></tr>
<tr class="separator:gac3f10e826d5983a3c7c0de385539fcd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga664947a79139bd1fe3267da9497dd2d7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga664947a79139bd1fe3267da9497dd2d7">XENH_VER_MAJOR_MASK</a>&#160;&#160;&#160;0xFF000000</td></tr>
<tr class="memdesc:ga664947a79139bd1fe3267da9497dd2d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version Major Mask.  <a href="group__enhance__v7__0.html#ga664947a79139bd1fe3267da9497dd2d7">More...</a><br /></td></tr>
<tr class="separator:ga664947a79139bd1fe3267da9497dd2d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1a5a725b10bef246e0a0610b49517323"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga1a5a725b10bef246e0a0610b49517323">XENH_VER_REV_MASK</a>&#160;&#160;&#160;0x0000F000</td></tr>
<tr class="memdesc:ga1a5a725b10bef246e0a0610b49517323"><td class="mdescLeft">&#160;</td><td class="mdescRight">VersionRevision Mask.  <a href="group__enhance__v7__0.html#ga1a5a725b10bef246e0a0610b49517323">More...</a><br /></td></tr>
<tr class="separator:ga1a5a725b10bef246e0a0610b49517323"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ed398a74064362a08ed2f01740a90a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga4ed398a74064362a08ed2f01740a90a2">XENH_VER_INTERNAL_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:ga4ed398a74064362a08ed2f01740a90a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version Internal Shift.  <a href="group__enhance__v7__0.html#ga4ed398a74064362a08ed2f01740a90a2">More...</a><br /></td></tr>
<tr class="separator:ga4ed398a74064362a08ed2f01740a90a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaf54133bd927346410404c388ae63def"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaaf54133bd927346410404c388ae63def">XENH_VER_REV_SHIFT</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:gaaf54133bd927346410404c388ae63def"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version Revision Shift.  <a href="group__enhance__v7__0.html#gaaf54133bd927346410404c388ae63def">More...</a><br /></td></tr>
<tr class="separator:gaaf54133bd927346410404c388ae63def"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa6eb547d4668a05c3d2db74cd9d857a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaa6eb547d4668a05c3d2db74cd9d857a9">XENH_VER_MINOR_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:gaa6eb547d4668a05c3d2db74cd9d857a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version Minor Shift.  <a href="group__enhance__v7__0.html#gaa6eb547d4668a05c3d2db74cd9d857a9">More...</a><br /></td></tr>
<tr class="separator:gaa6eb547d4668a05c3d2db74cd9d857a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac7abd50042b00c3685b658454ea5b8d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gac7abd50042b00c3685b658454ea5b8d5">XENH_VER_MAJOR_SHIFT</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:gac7abd50042b00c3685b658454ea5b8d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version Major Shift.  <a href="group__enhance__v7__0.html#gac7abd50042b00c3685b658454ea5b8d5">More...</a><br /></td></tr>
<tr class="separator:gac7abd50042b00c3685b658454ea5b8d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Enhance ActiveSize register Masks and Shifts</div></td></tr>
<tr class="memitem:gab2f7eaf32e6000187df542d96de33f8a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gab2f7eaf32e6000187df542d96de33f8a">XENH_ACTSIZE_NUM_PIXEL_MASK</a>&#160;&#160;&#160;0x00001FFF</td></tr>
<tr class="memdesc:gab2f7eaf32e6000187df542d96de33f8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active size Mask.  <a href="group__enhance__v7__0.html#gab2f7eaf32e6000187df542d96de33f8a">More...</a><br /></td></tr>
<tr class="separator:gab2f7eaf32e6000187df542d96de33f8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga176b48f8590c367fce65f23268603af4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga176b48f8590c367fce65f23268603af4">XENH_ACTSIZE_NUM_LINE_MASK</a>&#160;&#160;&#160;0x1FFF0000</td></tr>
<tr class="memdesc:ga176b48f8590c367fce65f23268603af4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of Active lines per Frame (Vertical) Mask.  <a href="group__enhance__v7__0.html#ga176b48f8590c367fce65f23268603af4">More...</a><br /></td></tr>
<tr class="separator:ga176b48f8590c367fce65f23268603af4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga10ede7da22925a8ce30645dfecc69cdf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga10ede7da22925a8ce30645dfecc69cdf">XENH_ACTSIZE_NUM_LINE_SHIFT</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ga10ede7da22925a8ce30645dfecc69cdf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Active size Shift.  <a href="group__enhance__v7__0.html#ga10ede7da22925a8ce30645dfecc69cdf">More...</a><br /></td></tr>
<tr class="separator:ga10ede7da22925a8ce30645dfecc69cdf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Enhance Noise Threshold Register Bit Masks</div></td></tr>
<tr class="memitem:ga8c49b2e9dbda59f09e9837f995281a13"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga8c49b2e9dbda59f09e9837f995281a13">XENH_NOISE_THRESHOLD_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:ga8c49b2e9dbda59f09e9837f995281a13"><td class="mdescLeft">&#160;</td><td class="mdescRight">Noise Threshold Mask.  <a href="group__enhance__v7__0.html#ga8c49b2e9dbda59f09e9837f995281a13">More...</a><br /></td></tr>
<tr class="separator:ga8c49b2e9dbda59f09e9837f995281a13"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Enhance Strength Register Bit Masks</div></td></tr>
<tr class="memitem:ga7b4b401f5836df3f5191f6dc24066c91"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#ga7b4b401f5836df3f5191f6dc24066c91">XENH_STRENGTH_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:ga7b4b401f5836df3f5191f6dc24066c91"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enhance Strength Mask.  <a href="group__enhance__v7__0.html#ga7b4b401f5836df3f5191f6dc24066c91">More...</a><br /></td></tr>
<tr class="separator:ga7b4b401f5836df3f5191f6dc24066c91"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Enhance Halo Suppress Register Bit Masks</div></td></tr>
<tr class="memitem:gaab94e5a55c69b0802ea6c4fb598a65d7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaab94e5a55c69b0802ea6c4fb598a65d7">XENH_HALO_SUPPRESS_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:gaab94e5a55c69b0802ea6c4fb598a65d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Halo Suppress Mask.  <a href="group__enhance__v7__0.html#gaab94e5a55c69b0802ea6c4fb598a65d7">More...</a><br /></td></tr>
<tr class="separator:gaab94e5a55c69b0802ea6c4fb598a65d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Backward compatibility macros</div></td></tr>
<tr class="memitem:ga73836da924ea27e4033708bb0bc71c02"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_CONTROL</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gac02c39726e454397a7c99fcc8bad831f">XENH_CONTROL_OFFSET</a></td></tr>
<tr class="separator:ga73836da924ea27e4033708bb0bc71c02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5dc54411890bef5cd0fa227b5316f924"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_STATUS</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gae35a4d3eb15145f520b65e126c13b0d5">XENH_STATUS_OFFSET</a></td></tr>
<tr class="separator:ga5dc54411890bef5cd0fa227b5316f924"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7b9e9150f5d47c1650008d5ee9c91080"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_ERROR</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gae45f51dd0d46b8f35b612ed3321c8b04">XENH_ERROR_OFFSET</a></td></tr>
<tr class="separator:ga7b9e9150f5d47c1650008d5ee9c91080"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21f5eebf9cffd6d60d4f95c350037540"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_IRQ_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga32c1a8cffe09936d9e052568b24cb604">XENH_IRQ_EN_OFFSET</a></td></tr>
<tr class="separator:ga21f5eebf9cffd6d60d4f95c350037540"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga127e6377e070fe2b1d4adeca7782ac41"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_VERSION</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga3957a8d03c339ff0bf8da971956a8e6a">XENH_VERSION_OFFSET</a></td></tr>
<tr class="separator:ga127e6377e070fe2b1d4adeca7782ac41"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2bde90b5eeecd208224947cdd54a8c70"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_SYSDEBUG0</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga4897593c07843cd849441417a73ef0fc">XENH_SYSDEBUG0_OFFSET</a></td></tr>
<tr class="separator:ga2bde90b5eeecd208224947cdd54a8c70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4db408e1fe84cc263a90261604dbfed4"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_SYSDEBUG1</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga221c5f74f4dace1d6040680097e2fdf0">XENH_SYSDEBUG1_OFFSET</a></td></tr>
<tr class="separator:ga4db408e1fe84cc263a90261604dbfed4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f30d3fe2e0a91975b4cb0917af80254"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_SYSDEBUG2</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gaabb5414fbc805f667e8faa7b10e78641">XENH_SYSDEBUG2_OFFSET</a></td></tr>
<tr class="separator:ga9f30d3fe2e0a91975b4cb0917af80254"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga10e1705d228058dedd4a9c98a4085759"><td class="memItemLeft" align="right" valign="top">
#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_ACTIVE_SIZE</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gadaf48c1c0f6cc7290fdd94ffbd835726">XENH_ACTIVE_SIZE_OFFSET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_NOISE_THRESHOLD</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gaf58fa6c3773713146da3ec3673db1ac1">XENH_NOISE_THRESHOLD_OFFSET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_ENHANCE_STRENGTH</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga885cd8bf6e191b9d29baff719566b5ac">XENH_ENHANCE_STRENGTH_OFFSET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_HALO_SUPPRESS</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gac224e30335309717fe4f82edfe46bb6c">XENH_HALO_SUPPRESS_OFFSET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_CTL_EN_MASK</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga1977282c1370b7a9b85323733962b351">XENH_CTL_SW_EN_MASK</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_CTL_RU_MASK</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gaa715dd1e076653a21145849c629bb012">XENH_CTL_RUE_MASK</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_CTL_RESET</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga0cac2df49aa7642c05f4e42c34f46b7c">XENH_CTL_RESET_MASK</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_CTL_AUTORESET</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga7e3fc91cb107b7993e42bd635572f96f">XENH_CTL_AUTORESET_MASK</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_In32</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga22996994009945110250415f4a458bca">XEnhance_In32</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_Out32</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga52a9d8e6362223499033bc73317b966d">XEnhance_Out32</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_ReadReg</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga0bf5fba775e0a7d6449bff866aac5a24">XEnhance_ReadReg</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>ENHANCE_WriteReg</b>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gab5694a82feda035f4229565fd76601a7">XEnhance_WriteReg</a></td></tr>
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<tr><td colspan="2"><div class="groupHeader">Interrupt Registers</div></td></tr>
<tr class="memitem:gaa13be0a7fd9cb5fdd01129ca91884216"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gaa13be0a7fd9cb5fdd01129ca91884216">XENH_ISR_OFFSET</a>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#gae35a4d3eb15145f520b65e126c13b0d5">XENH_STATUS_OFFSET</a></td></tr>
<tr class="memdesc:gaa13be0a7fd9cb5fdd01129ca91884216"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt status register generates a interrupt if the corresponding bits of interrupt enable register bits are set.  <a href="group__enhance__v7__0.html#gaa13be0a7fd9cb5fdd01129ca91884216">More...</a><br /></td></tr>
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<tr class="memitem:gacd111afd9e8a1df77c3d69b24d50685d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__enhance__v7__0.html#gacd111afd9e8a1df77c3d69b24d50685d">XENH_IER_OFFSET</a>&#160;&#160;&#160;<a class="el" href="group__enhance__v7__0.html#ga32c1a8cffe09936d9e052568b24cb604">XENH_IRQ_EN_OFFSET</a></td></tr>
<tr class="memdesc:gacd111afd9e8a1df77c3d69b24d50685d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Enable Register corresponds to Status bits.  <a href="group__enhance__v7__0.html#gacd111afd9e8a1df77c3d69b24d50685d">More...</a><br /></td></tr>
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